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© 2005 Microchip Technology Inc. DS01019A-page 1
AN1019
BASIC TERMS
The definition of “endurance” (as applied to EEPROMs)
contains various words and phrases that require clear
definition and understanding. As shown in the following
paragraphs,  different  manufacturers  use  different
standards. “Endurance cycling” is a test performed by
all manufacturers (and some customers) to determine
how many “write cycles” the product will achieve before
failing.
Microchip  defines  “endurance”  as  the  minimum
number of write cycles the product can be subjected to
before it fails.
“Failure”  is  a  somewhat  arbitrary  definition  since  a
device  only  truly  fails  when  it  no  longer  meets  the
customer  expectation  and  does  not  operate  in  his
system. A failure can be defined in this, the loosest of
definitions, or the most stringent of definitions (whereby
a  device  would  fail  if  it  did  not  meet  any  of  the  data
sheet parameters), as well as a wide range in between.
For example, if the device does not correctly store data
into  a  particular  address  that  is  not  used,  then  the
device would work correctly for the customer but would
fail a  functional test by the  manufacturer.  Likewise,  if
the  device  draws  more  current  than  the  data  sheet
specifies after some time, but the customer application
could  supply  the  current  needed,  the  device  would
work  in  the  customer  application  but  would  fail  a
parametric test set by the manufacturer.
Microchip uses the most stringent definition:
A failure occurs when the device fails to meet any
data sheet condition under any specified operating
condition of a temperature and voltage.
The number of devices that can fail before a particular
endurance criteria is not met is also somewhat flexible.
Even  the  most  quality-conscious  manufacturer  will
occasionally have a failure, so a failure level is defined.
There  are  several  industry  standard  conditions  for
many types of reliability tests. For example, IEEE-Std-
1005-1998 defines a maximum cumulative failure rate
of 1%. JEDEC (The Joint Electronic Device Engineer-
ing  Council),  JESD47,  defines  that  if  three  lots  of  77
units each have no fails (equivalent to an LTPD of 1%)
at  a  given  endurance  goal,  then  that  goal  has  been
met.
Microchip uses a more stringent criteria for endurance:
No fails out of a sample of 256 units per product, and
no fails out of 3 lots of 256 units each per technology
for the given endurance goal to have been met. That is
equivalent to 0/768 or less than 0.3% LTPD.
A  “write  cycle”  is  also  a  somewhat  flexible  definition
since almost every customer will write the device in a
different way. For example, if the customer application
uses  only  the  first  three  bytes  of  the  array  to  store
variable data, and the remainder of the array is used as
a  look-up  table,  then  a  write  cycle  will  be  complete
when the three data bytes have been re-written to their
new data state. 
A write cycle is often described as an erase/write cycle
since  almost  all  EEPROM  technologies  employ  an
“auto-erase”  before  the data  is actually written  to  the
array. This is also used by Microchip but we will use the
term  “write cycle”  since the auto-erase is  invisible to,
and cannot be suppressed by, the customer.
The term “data changes” is occasionally used in place
of  “write cycle”  or “erase/write  cycle.”  A  data change
will occur when an auto-erase cycle is initiated, and a
second  data  change  will  occur  upon  the  write  cycle,
therefore,  an  “erase/write  cycle”  is  equivalent  to  two
“data changes.” The term “data change” may also imply
that  a  different  type  of  cycling  is  being  used  than
“erase/write cycle”. This will be described later.
The  term  “write  cycle”  does  not  define  under  what
conditions  the  cycling  was  done  (unless  explicitly
stated), nor does it define the type of cycling that was
done.  The  endurance  cycling  can  be  done  at  any
number of conditions of voltage and temperature (e.g.,
85°C and 5.5V, or 25°C and 5.0V) that may or may not
meet with a customer’s application. The cycling mode
used in endurance cycling can affect the endurance of
the  product.  All  these  effects  will  be  described  later.
Microchip uses the most stringent conditions that are
reasonable for endurance cycling: Byte or Page mode
cycling at a temperature or 85°C at 5.5V. All data not
explicitly defined at other conditions is taken at these
conditions.
SYSTEM DESIGN CONSIDERATIONS
There are a number of design considerations that the
system designer can use to maximize the endurance of
an  EEPROM-based  device,  if  endurance  is  the
application’s limiting factor.
Author: David Wilkie
Microchip Technology Inc.
EEPROM Endurance Tutorial
Produktspecifikationer
| Varumärke: | Microchip | 
| Kategori: | Inte kategoriserad | 
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