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SAM D20 Family

Low-Power, 32-bit Cortex-M0+ MCUs with 12-bit ADC, 10-

bit DAC, 256-Channel PTC, RTC, and SERCOM

Features

Operating Conditions

• 1.62V – 3.63V, -40°C to +85°C, DC up to 48 MHz

• 1.62V – 3.63V, -40°C to +105°C, DC up to 32 MHz

• 2.7V – 3.63V, -40°C to +125°C Extended Temperature with compliance to AEC-Q100, DC up to 32MHz

Core

• Arm® Cortex®-M0+ CPU running at up to 48 MHz

– Single-cycle hardware multiplier

Memories

• 16/32/64/128/256 KB in-system self-programmable Flash

• 2/4/8/16/32 KB SRAM

System

• Power-on Reset (POR) and Brown-out Detection (BOD)

• Internal and external clock options with 48 MHz Digital Frequency Locked Loop (DFLL48M)

• External Interrupt Controller (EIC)

• Up to 16 external interrupts

• One non-maskable interrupt

• Two-pin Serial Wire Debug (SWD) programming, test and debugging interface

Low-Power

• Idle and Stand-by Sleep modes

• SleepWalking peripherals

Peripherals

• 8-channel Event System

• Up to eight 16-bit Timer/Counters (TC), configurable as:

– One 16-bit TC with two compare/capture channels

– One 8-bit TC with two compare/capture channels

– One 32-bit TC with two compare/capture channels, by using two TCs

• 32-bit Real Time Counter (RTC) with clock/calendar function

• Watchdog Timer (WDT)

• CRC-32 generator

• Up to six Serial Communication Interfaces (SERCOM), each configurable to operate as either:

– USART with full-duplex and single-wire half-duplex configuration

– Inter-Integrated Circuit (I2C) up to 400 kHz

– Serial Peripheral Interface (SPI)

• One 12-bit, 350 ksps Analog-to-Digital Converter (ADC) with up to 20 channels

– Differential and single-ended input

– 1/2x to 16x programmable gain stage

and its subsidiaries

Complete Datasheet DS60001504F-page 1

– Automatic offset and gain error compensation

– Oversampling and decimation in hardware to support 13-bit, 14-bit, 15-bit, or 16-bit resolution

• 10-bit, 350 ksps Digital-to-Analog Converter (DAC)

• Two Analog Comparators (AC) with Window Compare function

• Peripheral Touch Controller (PTC)

– Up to 256-channel capacitive touch and proximity sensing

I/O

• Up to 52 programmable I/O pins

Packages

• 64-pin TQFP, VQFN

• 64-ball UFBGA (not available in grades Extended Temperature and AEC-QA100)

• 48-pin TQFP, VQFN

• 45-ball WLCSP (not available in grades Extended Temperature and AEC-QA100)

• 32-pin TQFP, VQFN

• 27-ball WLCSP (not available in grades Extended Temperature and AEC-QA100)

Power Consumption

• Power Consumption

– Down to 50 µA/MHz in Active mode

– Down to 8 µA running the PTC

SAM D20 Family

and its subsidiaries

Complete Datasheet DS60001504F-page 2

Table of Contents

Features......................................................................................................................................................... 1

1. Configuration Summary.........................................................................................................................11

2. Ordering Information (1)......................................................................................................................... 13

3. Block Diagram.......................................................................................................................................14

4. Pinout.................................................................................................................................................... 15

4.1. SAM D20J.................................................................................................................................. 15

4.2. SAM D20G................................................................................................................................. 17

4.3. SAM D20E..................................................................................................................................19

5. Signal Descriptions List.........................................................................................................................21

6. I/O Multiplexing and Considerations..................................................................................................... 23

6.1. Multiplexed Signals.................................................................................................................... 23

6.2. Other Functions..........................................................................................................................25

7. Power Supply and Start-Up Considerations..........................................................................................27

7.1. Power Domain Overview............................................................................................................27

7.2. Power Supply Considerations.................................................................................................... 27

7.3. Power-Up................................................................................................................................... 29

7.4. Power-On Reset and Brown-Out Detector.................................................................................29

8. Product Mapping................................................................................................................................... 31

9. Memories.............................................................................................................................................. 32

9.1. Embedded Memories................................................................................................................. 32

9.2. Physical Memory Map................................................................................................................ 32

9.3. NVM Calibration and Auxiliary Space........................................................................................ 33

9.4. NVM User Row Mapping............................................................................................................33

9.5. NVM Software Calibration Area Mapping...................................................................................34

9.6. Serial Number............................................................................................................................ 35

10. Processor And Architecture.................................................................................................................. 36

10.1. Cortex M0+ Processor............................................................................................................... 36

10.2. Nested Vector Interrupt Controller..............................................................................................37

10.3. High-Speed Bus System............................................................................................................ 38

10.4. AHB-APB Bridge........................................................................................................................ 40

10.5. PAC - Peripheral Access Controller........................................................................................... 41

10.6. Register Description................................................................................................................... 41

11. Peripherals Configuration Summary..................................................................................................... 52

12. DSU - Device Service Unit.................................................................................................................... 54

12.1. Overview.................................................................................................................................... 54

12.2. Features..................................................................................................................................... 54

12.3. Block Diagram............................................................................................................................54

SAM D20 Family

and its subsidiaries

Complete Datasheet DS60001504F-page 3