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Sida 1/64
2013-2022
Microchip Technology Inc. and its subsidiaries DS70005136B-page 1
HIGHLIGHTS
This section of the manual contains the following major topics:
1.0 Introduction ....................................................................................................................... 2
2.0 Status and Control Registers ............................................................................................ 6
3.0 Modes of Operation ........................................................................................................ 21
4.0 Audio Protocol Interface Mode........................................................................................ 36
5.0 Interrupts......................................................................................................................... 56
6.0 Operation in Power-Saving and Debug Modes............................................................... 58
7.0 Effects of Various Resets ................................................................................................ 59
8.0 Peripherals Using SPI Modules ...................................................................................... 59
9.0 Related Application Notes............................................................................................... 60
10.0 Revision History .............................................................................................................. 61
Serial Peripheral Interface (SPI) with Audio Codec Support
dsPIC33/PIC24 Family Reference Manual
DS70005136B-page 2
2013-2022
Microchip Technology Inc. and its subsidiaries
1.0 INTRODUCTION
The Serial Peripheral Interface (SPI) module is a synchronous serial interface useful for
communicating with external peripherals and other microcontroller devices. These peripheral
devices may be a serial EEPROM, shift register, display driver, Analog-to-Digital Converter
(ADC) or an audio codec. The dsPIC33/PIC24 family SPI module is compatible with Motorola
®
SPI and SIOP interfaces. Figure 1-1 shows a block diagram of the SPI module.
Some of the key features of this module are:
• Host and Client modes support
• Four different clock formats
• Framed SPI protocol support
• Standard and Enhanced Buffering modes (Enhanced Buffering mode is not available on all
devices)
• User-configurable 8-bit, 16-bit and 32-bit data width
• Two separate shift registers for transmission and reception
• SPIx receive and transmit buffers are FIFO buffers in Enhanced Buffering mode
• User-configurable variable data width, from 2 to 32-bit
• Programmable interrupt event on every 8-bit, 16-bit and 32-bit data transfer
• Audio Protocol Interface mode
Some dsPIC33/PIC24 devices support audio codec serial protocols, such as Inter-IC Sound
(I2S), Left Justified, Right Justified and PCM/DSP modes for 16, 24 and 32-bit audio data. Refer
to the specific device data sheet for availability of these features.
The SPI serial interface consists of four pins:
• SDIx: Serial Data Input
• SDOx: Serial Data Output
• SCKx: Shift Clock Input or Output
• SSx: Active-Low Client Select or Frame Synchronization I/O Pulse
Note: This family reference manual section is meant to serve as a complement to device
data sheets. Depending on the device variant, this manual section may not apply to
all dsPIC33/PIC24 devices.
Please consult the note at the beginning of the “Serial Peripheral Interface
(SPI)” chapter in the current device data sheet to check whether this document
supports the device you are using.
Device data sheets and family reference manual sections are available for
download from the Microchip Worldwide Website at: http://www.microchip.com
2013-2022
Microchip Technology Inc. and its subsidiaries DS70005136B-page 3
Serial Peripheral Interface (SPI) with Audio Codec Support
Figure 1-1: SPIx Module Block Diagram
Internal
Data Bus
SDIx
SDOx
SSx
SCKx
SPIxRXSR(2)
Shift
Control
Enable Host Clock
Transmit
SPIxRXB(1)
Receive
Note 1: The SPIx Receive Buffer (SPIxRXB) and SPIx Transmit Buffer (SPIxTXB) registers are accessed through the
SPIxBUF register and are multi-element FIFO buffers in Enhanced Buffer mode (pointer arithmetic is circular
for these buffers). Enhanced Buffer mode is not available on all devices. Refer to the specific device data
sheet for availability.
2: The SPIx Shift register is not directly accessible by application software.
3: When the CPU Read Pointer (CRPTR) is less than or equal to the SPI Write Pointer (SWPTR), the CRPTR is
incremented when the application reads a data element from the SPIxRXB register and the SWPTR is
incremented when a data element is moved from the SPIxRXSR register to the SPIxRXB register.
4: The SPI Read Pointer (SRPTR) is less than or equal to the CPU Write Pointer (CWPTR). The CWPTR is
incremented when the application writes a new data element to the SPIxBUF register and the SRPTR is
incremented when data are moved from the SPIxTXB register to the SPIxTXSR register.
SPIxBUF
Read
PBCLK
MCLK
MCLKSEL
CWPTR(4)
SRPTR
SWPTR (3)
CRPTR
SPIxBUF
MSB
Edge
Select
TXELM[5:0]
URDTEN
MSB
SPIxTXSR(2)
SPIxTXB(1)
Write
Client Select
Sync Control
and Frame Clock
Control
Clock
Control
SPIxURDT
Generator
Baud Rate
Edge
Select
Produktspecifikationer
| Varumärke: | Microchip |
| Kategori: | Inte kategoriserad |
| Modell: | PIC24FJ128GU410 |
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