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SN54AHC138, SN74AHC138

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

SCLS258L − DECEMBER 1995 − REVISED JULY 2003

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

DOperating Range 2-V to 5.5-V VCC

DDesigned Specifically for High-Speed

Memory Decoders and Data-Transmission

Systems

DIncorporate Three Enable Inputs to Simplify

Cascading and/or Data Reception

DLatch-Up Performance Exceeds 250 mA Per

JESD 17

DESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

− 1000-V Charged-Device Model (C101)

32120 19

9 101112 13

4

5

6

7

8

18

17

16

15

14

Y1

Y2

NC

Y3

Y4

C

G2A

NC

G2B

G1

B

A

NC

Y6

Y5

V

Y0

Y7

GND

NC

SN54AHC138 . . . FK PACKAGE

(TOP VIEW)

CC

NC − No internal connection

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

A

B

C

G2A

G2B

G1

Y7

GND

VCC

Y0

Y1

Y2

Y3

Y4

Y5

Y6

SN54AHC138 . . . J OR W PACKAGE

SN74AHC138 . . . D, DB, DGV, N, NS,

OR PW PACKAGE

(TOP VIEW)

SN74AHC138 . . .RGY PACKAGE

(TOP VIEW)

1 16

8 9

2

3

4

5

6

7

15

14

13

12

11

10

Y0

Y1

Y2

Y3

Y4

Y5

B

C

G2A

G2B

G1

Y7

A

Y6 V

GND

CC

description/ordering information

The ’AHC138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing

applications that require very short propagation-delay times. In high-performance memory systems, these

decoders can be used to minimize the effects of system decoding. When employed with high-speed memories

utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are

less than the typical access time of the memory. This means that the effective system delay introduced by the

decoders is negligible.

ORDERING INFORMATION

TAPACKAGE†ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

QFN − RGYTape and reelSN74AHC138RGYRHA138

PDIP − NTubeSN74AHC138NSN74AHC138N

SOIC D

Tube SN74AHC138D

AHC138

SOIC − DTape and reelSN74AHC138DRAHC138

−40° °C to 85CSOP − NSTape and reelSN74AHC138NSRAHC138

SSOP − DBTape and reelSN74AHC138DBRHA138

TSSOP PW

Tube SN74AHC138PW

HA138

TSSOP − PWTape and reelSN74AHC138PWRHA138

TVSOP − DGVTape and reelSN74AHC138DGVRHA138

CDIP − JTubeSNJ54AHC138JSNJ54AHC138J

−55° °C to 125CCFP − WTubeSNJ54AHC138WSNJ54AHC138W

55 C

to

125 C

LCCC − FKTubeSNJ54AHC138FKSNJ54AHC138FK

†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

Copyright © 2003, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Produktspecifikationer