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CD4049UB and CD4050B CMOS Hex Inverting Buffer and Converter

1 Features

•CD4049UB Inverting

•CD4050B Noninverting

•High Sink Current for Driving 2 TTL Loads

•High-to-Low Level Logic Conversion

•100% Tested for Quiescent Current at 20 V

•Maximum Input Current of 1 µA at 18 V Over Full

Package Temperature Range; 100 nA at 18 V and

25°C

•5-V, 10-V, and 15-V Parametric Ratings

2 Applications

•CMOS to DTL or TTL Hex Converters

•CMOS Current or DriversSink Source

•CMOS High-to-Low Logic Level Converters

3 Description

The CD4049UB and CD4050B devices are inverting

and noninverting hex buffers, and feature logic-level

conversion using only one supply voltage (VCC). The

input-signal high level (VIH) can exceed the VCC

supply voltage when these devices are used for logic-

level conversions. These devices are intended for use

as CMOS to DTL or TTL converters and can drive

directly two DTL or TTL loads. (VCC = 5 V,

VOL ≤ 0.4 V, and IOL ≥ 3.3 mA.)

Device Information

PART NUMBER(1) PACKAGEBODY SIZE (NOM)

CD4049UBE,

CD4050BE PDIP (16)6.35 mm × 19.30 mm

CD4049UBD,

CD4050BD SOIC (16)9.90 mm × 3.91 mm

CD4049UBDW,

CD4050BDW SOIC (16)10.30 mm × 7.50 mm

CD4049UBNS,

CD4050BNS SO (16)10.30 mm × 5.30 mm

CD4049UBPW,

CD4050BPW TSSOP (16)5.00 mm × 4.40 mm

(1)For all available packages, see the orderable addendum at

the end of the data sheet.

V

OUT

CC

V

P

SS

N

R

IN

Copyright © 2016,

Texas Instruments Incorporated

1 of 6 Identical Units

Schematic Diagram of CD4049UB

P

N

R

IN

V

OUT

CC

V

P

SS

N

Copyright © 2016, Texas Instruments Incorporated

1 of 6 Identical Units

Schematic Diagram of CD4050B

CD4049UB, CD4050B

SCHS046K – AUGUST 1998 – REVISED JUNE 2020

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

Produktspecifikationer