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1

Data sheet acquired from Harris Semiconductor

SCHS191C

Features

•Buered Inputs

•Asynchronous Parallel Load

•Fanout (Over Temperature Range)

-Standard Outputs. . . . . . . . . . . . . . .10 LSTTL Loads

-Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

•Wide Operating Temperature Range . . .-55oC to 125oC

•Balanced Propagation Delay and Transition Times

•Significant Power Reduction Compared to LSTTL

Logic ICs

•HC Types

-2V to 6V Operation

-High Noise Immunity: NIL = 30%, NIH = 30% of VCC

at VCC = 5V

•HCT Types

-4.5V to 5.5V Operation

-Direct LSTTL Input Logic Compatibility,

VIL= 0.8V (Max), VIH = 2V (Min)

-CMOS Input Compatibility, Il≤µ1A at VOL, VOH

Description

The ’HC597 and CD74HCT597 are high-speed silicon gate

CMOSdevices that are pin-compatible withthe LSTTL 597

devices. Each device consistsof an8-flip-flopinput register

and an8-bit parallel-in/serial-in, serial-outshift register. Each

registeris controlledby itsown clock.A “low”onthe parallel

load input(PL) shifts parallelstored data asynchronously into

the shiftregister. A“low”master input(MR)clears theshift

register.Serial inputdata canalso besynchronously shifted

through the shift register whenPL is high.

Pinout

CD54HC597

(CERDIP)

CD74HC597

(PDIP, SOIC, SOP)

CD74HCT597

(PDIP, SOIC)

TOP VIEW

Ordering Information

PART NUMBERTEMP. RANGE (oC) PACKAGE

CD54HC597F3A-55 to 12516 Ld CERDIP

CD74HC597E-55 to 12516 Ld PDIP

CD74HC597M-55 to 12516 Ld SOIC

CD74HC597MT-55 to 12516 Ld SOIC

CD74HC597M96-55 to 12516 Ld SOIC

CD74HC597NSR-55 to 12516 Ld SOP

CD74HCT597E-55 to 12516 Ld PDIP

CD74HCT597M-55 to 12516 Ld SOIC

CD74HCT597MT-55 to 12516 Ld SOIC

CD74HCT597M96-55 to 12516 Ld SOIC

NOTE:Whenordering, usethe entirepartnumber. Thesuffixes96

andRdenote tapeandreel.ThesuffixTdenotesa small-quantity

reel of 250.

14

15

16

9

13

12

11

10

1

2

3

4

5

7

6

8

D1

D2

D3

D4

D5

D6

GND

D7

VCC

DS

PL

STCP

SHCP

MR

Q7

D0

January 1998 - Revised October 2003

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

Copyright © 2003, Texas Instruments Incorporated

CD54HC597, CD74HC597,

CD74HCT597

High-Speed CMOS Logic

8-Bit Shift Register with Input Storage

[ /Title

(CD74

HC597

,

CD74

HCT59

7)

/Sub-

ject

(High

Speed

CMOS

Produktspecifikationer