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SRG8

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10

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15

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EN3

C2

R

C1

1D

G

RCK

CLR

SRCK

SER IN

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11

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13

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DRAIN0

DRAIN1

DRAIN2

DRAIN3

DRAIN4

DRAIN5

DRAIN6

DRAIN7

SER OUT

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TPIC6C595

SLIS061D– JULY1998 – REVISEDSEPTEMBER2015

TPIC6C595 Power Logic 8-Bit ShiftRegister

Outputs are low-side, open-drain DMOS transistors

1 Features

with output ratings of 33-V to 100-mA continuous

1

•Low rDS(on), 7TypicalΩsink-current capability. Each output provides a

•Avalanche Energy, 30 mJ250-mAmaximumcurrent limitat TC= 25°C. The

current limit decreases as the junction temperature

•Eight Power DMOSTransistor Outputs of 100-mA

increases for additional device protection. The device

Continuous Currentalso provides up to 2500 V of ESD protection when

•250-mA Current Limit Capabilitytested using the human-body modeland the 200-V

•ESD Protection, 2500 Vmachine model.

•Output Clamp Voltage, 33 VThe TPIC6C595 ischaracterized foroperation over

•Devices are Cascadablethe operating casetemperature range of40°Cto−

125°C.

•Low-Power Consumption

Device Information(1)

2 Applications

PART NUMBERPACKAGEBODY SIZE (NOM)

•Instrumentation ClustersSOIC (16)9.90 mm× 3.91 mm

•Tell-Tale LampsTPIC6C595TSSOP (16)5.00 mm× 4.40 mm

•LED Illumination and ControlsPDIP (16)19.30 mm × 6.35 mm

•Automotive Relay or Solenoids(1)For allavailable packages,see theorderable addendumat

• Driversthe end of the data sheet.

Logic Symbol

3 Description

The TPIC6C595 is a monolithic, medium-voltage,

low-current power 8-bitshift register designed for use

in systems that require relatively moderate load

power such asLEDs. The device contains abuilt-in

voltage clamp on the outputs for inductive transient

protection. Power driverapplications include relays,

solenoids, and otherlow-current or medium-voltage

loads.

This device contains an 8-bit serial-in, parallel-out

shift registerthat feeds an8-bit D-type storage

register. Data transfersthrough both the shift and

storage registersonthe risingedge ofthe shift

register clock(SRCK) and the register clock(RCK),

respectively. The device transfers data out the serial

output (SER OUT) port on the rising edge of SRCK.

The storage register transfers data to the output

buerwhen shiftregister clear(CLR) ishigh. When

CLR is low, the input shift register is cleared. When

output enable (G)is held high, all data inthe outputThis symbol is in accordance with

buers isheld lowandall drain outputs areo.WhenANSI/IEEE Std 91-1984 and IEC

Gis held low,data from thestorage registerisPublication 617-12.

transparent to the output buers.When data in the

outputbuers is low,the DMOStransistor outputs are

o.When data is high, the DMOStransistor outputs

havesink-current capability.The SEROUTallows for

cascading ofthe data fromthe shift registerto

additional devices.

1

AnIMPORTANT NOTICEat theend of thisdata sheetaddressesavailability, warranty,changes, usein safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

Produktspecifikationer