Xaoc Drezno Bruksanvisning
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Inte kategoriserad
Drezno
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Sida 1/8
DREZNO LIPSK
thE LEIbNIZ bINaRy SubSyStEm
binary
conversion
komputor
& bit inversion
commander
Models of 1989
operator’s manual rev. 1989/1.0
SaLut
group of 8-bit signal processing devices offering
comprehensive digital signal manipulation, as well
as audio signal, control voltage, trigger, and gate
generation. Drezno is the input/output front-end
of the system, consisting of an analog–to–digital
-
analog signals and voltages based on their binary
bits of the digital signal representation.
INStaLLatION
-
be plugged into the bus board, paying close atten-
the negative 12V rail and should align with the dot,
–12V, or red stripe marks on both the unit and
reversed power connection, however reversing the
16-pin header may cause serious damage to oth-
er components of your system by short-circuiting the
Lipsk or more expansion modules to form an out-
-
-
-
should be fastened by mounting the supplied screws
-
vices, we strongly advise the user to read through the
entire manual before using the modules.
bINaRy cODE
-
N-1
0
an 8-bit system, there are 256 possible values, from
value is in the top or bottom half of the range, and
system, the individual bits are represented as gate
-
coming analog voltage is converted into eight gates.
DREZNO cONtROLS aND OPERatION
ADC input
1
expects either audio or CV signals.
2
, represent-
ing each of the eight bits, 7 to 0
gain
3
and offset
4
sliders allow the user to
adapt the range of the signal fed to the A/D con-
expects only positive voltages, so for bipolar input
signals, set the slider to the upper position. offset
adc clock input
5
allows
the user to override the internal clock by freezing
the output code at the rising edge of the input sig-
the adc clock allows the user to control the ADC
sampling rate. ADC output activity is indicated by
the corresponding set of eight yellow LEDs
12
.
eight DAC gate inputs
6
, representing each of the
eight bits numbered from 7 to 0dac output
7
produces a CV or audio signal based on the input
dac clock input
8
expects gate/trigger
signals and is normalized to the ADC clock via the
ribbon cable connected to the expander sockets on
clock can be replaced by a clock produced by an ex-
pander module, and it can be overridden by any sig-
also features gain
9
and offset
10
sliders which
2
modules
explained
3
fig. 1
front panel
overview
5 812
1 7
2 6
3 9
4 10
11
Produktspecifikationer
| Varumärke: | Xaoc |
| Kategori: | Inte kategoriserad |
| Modell: | Drezno |
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