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DS90UB941AS-Q1 2K DSI to FPD-Link III Bridge Serializer with Video Splitting

1 Features

•AEC-Q100 qualified for automotive applications

with the following results:

–Device temperature grade 2: −40℃ to +105℃

ambient operating temperature

•Supports pixel clock frequency up to 210 MHz for

3K (2880x1620) at 30Hz, QXGA (2048x1536), 2K

(2880x1080), WUXGA (1920x1200), or 1080p60

(1920x1080) resolutions with 24-bit color depth

•MIPI D-PHY / Display Serial Interface (DSI)

receiver provides a high-bandwidth interface to

video processor or FPGA

–Dual DSI input ports with up to 4 data lanes

each

–Up to 1.5 Gbps per lane

–Superframe with symmetric and asymmetric

unpacking capability

–ECC and CRC generation

–Virtual channel capability

•Single and dual FPD-Link III outputs

–Single link: up to 105MHz pixel clock

–Dual link: up to 210MHz pixel clock

•Functional Safety-Capable

–Documentation available to aid ISO 26262

system design

•Symmetric and asymmetric video splitting

2 Applications

•Automotive Infotainment:

–IVI Head units and HMI modules

–Central information displays

–Digital instrument clusters

–Rear seat entertainment systems

3 Description

The DS90UB941AS-Q1 is a dual DSI to FPD-Link III

bridge serializer designed for automotive infotainment

applications. When paired with an FPD-Link III

DS90UB940N-Q1, DS90UB948-Q1, DS90UB924-Q1,

DS90UB926Q-Q1 or DS90UB928Q-Q1 deserializer,

the DS90UB941AS-Q1 can supply 1- or 2-lane high-

speed serial streams over cost-effective, 50 Ω, single-

ended coaxial cables or over 100 Ω, differential

shielded twisted-pair (STP) and shielded twisted-quad

(STQ) cables. In response to the rise in number and

variance of displays in infotainment systems, the

DS90UB941AS-Q1 can support symmetric and

asymmetric splitting.

The DS90UB941AS-Q1 can consolidate video data

over two differential pairs to simplify system design

and decrease the interconnect size and weight of the

application.

The FPD-Link III interface supports video and audio

data transmission and full duplex control, including

I2C communication and up to eight I2S audio

channels over the same high-speed serial link. EMI is

minimized by the use of low voltage differential

signaling, data scrambling, and randomization.

Device Information

PART NUMBER

(1)

PACKAGEBODY SIZE (NOM)

DS90UB941AS-Q1VQFN (64)9.00 mm × 9.00 mm

(1)For all available packages, see the orderable addendum at

the end of the data sheet.

FPD-Link III

IDx

DOUT0+

DOUT0-

DOUT1+

DOUT1-

RIN0+

RIN0-

RIN1+

RIN1-

CLK0+/-

CLK1+/-

Open LDI (*)

D0+/-

D1+/-

D2+/-

D3+/-

D4+/-

D5+/-

D6+/-

D7+/-

DS90UB941AS

Serializer

(Dual FPD-Link)

DS90UB948 (*),

DS90UB940N (CSI-2)

Deserializer

(Single FPD-Link)

DS90UB924(*),

DS90UB926 (RGB),

DS90UB928(*)

Deserializer

IDx

HS_GPIO

(SPI)

HS_GPIO

(SPI)

LVDS

Display

or Graphic

Processor

Processor

I2CI2C

CLK+/-

D0+/-

D1+/-

D2+/-

D3+/-

DSI

Applications Diagram

www.ti.com

DS90UB941AS-Q1

SNLS640C – DECEMBER 2018 – REVISED JANUARY 2021

Copyright ©2021 Texas Instruments Incorporated

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DS90UB941AS-Q1

SNLS640C – DECEMBER 2018 – REVISED JANUARY 2021

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

Produktspecifikationer